Which instructions represent correct VHDL given the following declarations? signal BOOL: boolean; signal A_INT, B_INT, Z_INT: Integer range O to 15; signal Z_BIT : std logic; signal A_VEC, B_VEC,...

Extracted text: Which instructions represent correct VHDL given the following declarations? signal BOOL: boolean; signal A_INT, B_INT, Z_INT: Integer range O to 15; signal Z_BIT : std logic; signal A_VEC, B_VEC, z_VEC: std_logik_vector (3 downto 0: signal A VEC2, BVEC2, Z_VECZ: std_logik vector (7 downto 0: Select one: *a. ZINT AINT = "0001"; b. ZINT AINT - B_INT; °c Z VEC A_VEC2 and B_VEC2; °d Z BIT AVEC and B_INT;