Which instructions represent correct VHDL given the following declarations ? signal BOOL : boolean; signal A_INT, B_INT, Z_INT: integer range 0 to 15; signal Z_BIT : std_logic; signal A_VEC, B_VEC,...

Extracted text: Which instructions represent correct VHDL given the following declarations ? signal BOOL : boolean; signal A_INT, B_INT, Z_INT: integer range 0 to 15; signal Z_BIT : std_logic; signal A_VEC, B_VEC, Z_VEC: std_logic_vector (3 downto 0); signal A_VEC2, B_VEC2, Z_VEC2: std_logic_vector (7 downto 0); Select one: a. Z_INT <= a_int = "0001; ° b. z_int <= a_int + b_int; ° c. z_vec <= a_vec2 and b_vec2; ° d. z_bit <= a_vec and b_int;

a_int="">
>