Which assignments are correct with the following definitions? signal A_BUS, B_BUS, z_BUS: std_logic_vector (3 downte 0); signal A_BIT, B_BIT, CBIT, D_BIT : std_logic signal BYTE: std logic_vector (7...

Extracted text: Which assignments are correct with the following definitions? signal A_BUS, B_BUS, z_BUS: std_logic_vector (3 downte 0); signal A_BIT, B_BIT, CBIT, D_BIT : std_logic signal BYTE: std logic_vector (7 downto 0): Select one: °a BYTE ABUS: *b. BYTE (3 downto 0) 1&B_BIT & 0; °c ZBUS A_BIT &B_BIT, a. BYTET downto 4) A_BIT & B_BIT &A_BIT & B_BIT;