This question asks you to discuss issues of performance, i.e., whether the MIPS computer performs better than the basic computer does. Assume that, for both computers, all execution steps take one...

1.
We want to load data in R10 from memory.
*you always load data from R10 or it is just an example?
I have taken this as an example. We load data from memory to any of the registers.
ADR is the 16 bit immediate operand.
Direct Address
LW R10, R0(ADR)
This takes 5 cycles
Immediate Operand
ADDI R10, R0(ADR)
This takes 5 cycles
Relative Address
ADD R9, R0, PC
LW R10, R9(ADR)
This takes 9 cycles
Indexed Address
LW R10, R7(ADR)
This takes 5 cycles
Register
ADD R10, R0, R9
This takes 4 cycles
Register Indirect
LW R10, R9(0)
This takes 5 cycles
Auto-increment
LW R10, R9(0)
ADDI R9, R9(1)
This takes 9 cycles
Auto-decrement
LW R10, R9(0)
SUBI R9, R9(1)
This takes 9 cycles
2.
(a) Data Transfer Operation
LW – Load Word
T0: IR  M[PC]
T1: A  rs1, PC  PC + 1
T2: MAR  A + IR(0 – 15)
T3: C  M[MAR]
T4: rd  C
SW – Store Word
T0: IR  M[PC]
T1: A  rs1, B  rd, PC  PC + 1
T2: MAR  A + IR(0 – 15)
T3: MDR  B
T4: M[MAR]  MDR
(b) ALU Operation
AND
T0: IR  M[PC]
T1: A  rs1, B  rs2, PC  PC + 1
T2: C  A ^ B *what does it mean A^B or what does it do?
In Register Transfer Language, we use ‘^’ to mean AND operation.
T3: rd  C
SUBI
T0: IR  M[PC]
T1: A  rs1, PC  PC + 1
T2: C  A + IR(0 – 15)’ + 1 *What does it mean this ( ‘ ) next to (0-15)’ or A’. What
does it do? It changes the sign?
This means complement. This operation would complement all the bits from 0 – 15 of
the IR. This has been done for subtraction. As A – B is equivalent to A + B’ + 1.
T3: rd  C
SGTI
T0: IR  M[PC]
T1: A  rs1, PC  PC + 1
T2: C  A – IR(0 – 15)
T3: A  R0
C31’T4: C  A’ *what is the meaning of this C31?
C31 means the 31
st bit or the...