The source-degenerated current mirror in Fig. 3.12 is implemented in the 0.18-μm CMOS process in Table 1.5 to mirror a current of with . a. Estimate the small-signal output resistance and minimum...

The source-degenerated current mirror in Fig. 3.12 is implemented in the 0.18-μm CMOS process in Table 1.5 to mirror a current of with .

a. Estimate the small-signal output resistance and minimum output voltage of the mirror with .

b. Compare the results in part (a) to those is obtained with , a simple NMOS current mirror.