The LDO regulator of Fig. 7.19 is to be operated under a 1.8-V supply using the device parameters in Table 1.5. It delivers 20 mA of output current at 1.2 V output voltage. a. Determine the width of...

The LDO regulator of Fig. 7.19 is to be operated under a 1.8-V supply using the device parameters in Table 1.5. It delivers 20 mA of output current at 1.2 V output voltage.

a. Determine the width of PMOS transistor so that .

b. With an output capacitance of , estimate the output pole .

c. Estimate the capacitances and .

d. What must the amplifier transconductance, , be in order to ensure the amplifier has a dc gain of 30-dB and that the output pole frequency is dominant so that ?

e. Estimate the dc current required to bias a differential pair with and a small-signal transconductance, . If this represents the majority of the amplifier’s current consumption, what is the resulting efficiency of the linear regulator?

f. Sketch . 0.35-μm Q1 VGS, 1 = 800 mV Q1 0.18-μm Q1 Veff1 = 300 mV CL = 10 pF ωpL Cgs1 Cgd1 Gma ωpL ωpa ⁄≈ 100 Veff = 150 mV gm = Gma PSRR( )