The inverter of Fig. P3.73 is known as pseudo nMOS, and fi nds application as an alternative to CMOS in special situations that are beyond the scope of the present chapter. (a) Assuming VDD 5 5 V, Vtn...

The inverter of Fig. P3.73 is known as pseudo nMOS, and fi nds application as an alternative to CMOS in special situations that are beyond the scope of the present chapter. (a) Assuming VDD 5 5 V, Vtn 5 2Vtp 5 1 V, kp 5 40 A/V2 , kn 5 200 A/V2 , and n 5 p 5 0, fi nd VOH, VOL, NML, and NMH. (b) How much current does this gate draw from the supply when vI 5 0 V? When vI 5 5 V? Compare with the CMOS inverter of Fig. 3.64, and comment. Hint: exploit the fact that iDp 5 iDn.