The folded cascode amplifier in Fig. P6.28, is to be designed using the process parameters for the process in Table 1.5. Assume the bias voltage of the input is such that the bias voltage of the...

The folded cascode amplifier in Fig. P6.28, is to be designed using the process parameters for the process in Table 1.5. Assume the bias voltage of the input is such that the bias voltage of the output is 1.5 V.

a. Find the device widths so that for all transistors except and . Take . Take for all transistors.

b. Find the bias voltages at all nodes and verfify that all transistors are in the active region. (Ignore the body-effect when calculating the nodal voltages.)

c. Find the impedance separately looking into the drain of and looking into the drain of and also the amplifier output impedance.

d. Find the amplifier gain.

e. Assuming the load capacitance is 0.25pF and dominates, what is the –3dB bandwidth of the the amplifier? What is the unity-gain frequency of the amplifier?