The EC pair Q1–Q2 of Fig. P4.46 utilizes the emitter followers Q3–Q4 to lower the currents drawn from the sources vI1 and vI2 and thus raise the ac input resistances Ri1 and Ri2 seen by the same...

The EC pair Q1–Q2 of Fig. P4.46 utilizes the emitter followers Q3–Q4 to lower the currents drawn from the sources vI1 and vI2 and thus raise the ac input resistances Ri1 and Ri2 seen by the same sources. Let VCC 5 2VEE 5 6 V, RC1 5 RC2 5 10 kV, RE3 5 RE4 5 15 kV, and IEE 5 1 mA. Moreover, assume VBE1 5 VBE2 5 0.7 V and F 5 100 for all BJTs. (a) Find the base currents IB3 and IB4 and the collector voltages VO1 and VO2 at dc balance. (b) If vI1 5 vi and vI2 5 0, obtain expressions for ve1, ve2, ve3, and ve4 in terms of vi . Hint: exploit the symmetry of the circuit. (c) Obtain expressions for vo1 and vo2 in terms of vi . Hence, assuming ro 5 `, fi nd the gain vodyvi . (d) Again exploiting circuit symmetry, fi nd the input resistances Ri1 and Ri2. (e) What is the upper limit on uvi u for which the condition uvbeu # 5 mV is met by all BJTs?