The circuit of Fig. P5.19 is the dual of that of Fig. 5.13 because we can obtain it by interchanging pMOSFETs with nMOSFETs and vice versa, and by interchanging the power-supply polarities. (a) Repeat...

The circuit of Fig. P5.19 is the dual of that of Fig. 5.13 because we can obtain it by interchanging pMOSFETs with nMOSFETs and vice versa, and by interchanging the power-supply polarities. (a) Repeat Example 5.2 for the present circuit, compare with its dual, and comment. (b) Since the size of the IC is infl uenced by the sum of the Ws, which circuit is likely to use less chip area? There are two reasons why the version of Fig. 5.13 is more popular: (a) a pMOSFET SC pair exhibits lower fl icker noise than an nMOSFET pair (see Chapter 7), and (b) the CS stage exhibits a higher gm if M5 is an nMOSFET instead of a pMOSFET, a feature that facilitates frequency compensation (again, see Chapter 7).