The circuit of Fig. P4.22 is required to sink IO 5 1 mA at Ro $ 100 kV. Since the FET has ro 5 20 kV, the circuit uses source degeneration to raise the resistance seen looking into the drain. (a) If k...

The circuit of Fig. P4.22 is required to sink IO 5 1 mA at Ro $ 100 kV. Since the FET has ro 5 20 kV, the circuit uses source degeneration to raise the resistance seen looking into the drain. (a) If k 5 2 mA/V2 and Vt 0 5 0.5 V, fi nd the required values of RS and VG, assuming 5 0. (b) If 5 0.48 V1y2 and u2 pu 5 0.6 V, recalculate the required and VG, and fi nd the resulting Ro.