The circuit in Fig. P4.30 is perfectly symmetric and the small signal input voltages are balanced so that . The bias voltages and are chosen to ensure all transistors remain in active mode. What is...

The circuit in Fig. P4.30 is perfectly symmetric and the small signal input voltages are balanced so that . The bias voltages and are chosen to ensure all transistors remain in active mode. What is the equivalent half-circuit in this case? Estimate the amplifier’s 3-dB bandwidth.