The biCMOS inverter of Fig. P6.61 takes advantage of the best of both technologies (high input impedance of MOSFETs and high current-drive capabilities of BJTs) to handle large capacitive loads. As vI...

The biCMOS inverter of Fig. P6.61 takes advantage of the best of both technologies (high input impedance of MOSFETs and high current-drive capabilities of BJTs) to handle large capacitive loads. As vI is switched to 0V, M1 pulls Q1’s base to 5 V, giving VOH > 5 2 0.7 5 4.3 V. At the same time, M4 pulls Q2’s base to 0 V to rapidly turn it off. As vI is switched to 5 V, M2 pulls Q1’s base to 0 V to rapidly turn it off. At the same time, M3 turns Q2 on in Darlington fashion while also clamping its collector at VOL 5 VBE2 1 VDS3 > 0.7 1 0 5 0.7 V, thus preventing it from saturating. Assuming the FETs have Vt 5 1 V and k 5 100 A/V2 , and the BJTs have VBE(on) 5 0.7 V and F 5 75, estimate tPLH and tPHL for CL 5 25 pF.