Take the CAT implementationPlease do:- Implement the “Store” instruction.- Write a small (CAT) program to add two 1 x N vectors (that is add the corresponding values in two lists of numbers)[1, 2, 3]...

Take the CAT implementationPlease do:- Implement the “Store” instruction.- Write a small (CAT) program to add two 1 x N vectors (that is add the corresponding values in two lists of numbers)[1, 2, 3] + [4, 5, 6] ->-> [5, 7, 9]Where N will be less than 100- Instrument the CAT VM to count number of instructions executed, clock cycles, number of memory references- Implement (CAT) data hazard detection, if CAT were pipelined with a 5 stage pipeline Implement control (branch) hazard detectionShow working with demo program you wrote, aboveThen, for the CAT implementation:- Implement a scoreboard (or similar) to detect data hazards- Show where these hazards exist (in the source asm/binary code), and the scoreboard results,Why these hazards exist, how long it is necessary to stall.- Implement Control (Branch) hazard detection on CATShow where these hazards exist (in the source asm/binary code), and the scoreboard results, Why these hazards exist, how long it is necessary to stall- Implement one bit branch prediction for CAT