For a direct-mapped cache design with a 32-bit address, the following bitsof the address are used to access the cache. Use the table below.
a. What is the cache block size (in words)?b. How many entries does the cache have?c. What is the ration between total bits required for such a cache implementation overthe data storage bit?
Already registered? Login
Not Account? Sign up
Enter your email address to reset your password
Back to Login? Click here