Shown in Fig. P3.47 is an nMOSFET realization of the logic function known as NOR. Assuming identical FETs with Vt 5 1.0 V, k 5 0.25 mA/V2 , and 5 0, prepare the truth table, identifying the operating region of each FET (CO or Ohmic), and calculate the output node voltage for the following voltage combinations at the input nodes A and B: (A, B) 5 (0 V, 0 V), (0 V, 5 V), (5 V, 0 V), (5 V, 5 V). Hint: two identical FETS in parallel act like a single FET with the same Vt but with k twice as large.
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