Shown in Fig. P3.22 is a PMOS current mirror with , , , and all transistors sized and having the device parameters for the 0.18-μm CMOS process in Table 1.5. a. With , are all transistors in active...

Shown in Fig. P3.22 is a PMOS current mirror with , , , and all transistors sized and having the device parameters for the 0.18-μm CMOS process in Table 1.5.

a. With , are all transistors in active mode?

b. What is the maximum voltage that can appear at while still keeping all transistors in active mode?

c. Assuming all transistors are in active mode, what is the small-signal output resistance seen looking into the drain of ?

d. Compare this current mirror to the conventional cascode current mirror presented in Section 3.6.