Shown in Fig. P2.40 is a BJT realization of the logic function known as NAND. (a) Assuming L 5 0 V and H 5 5 V, prepare the truth table, showing the state of each BJT (CO or Sat) as well as the logic level (H or L) of Y for each of the four possible input combinations: (A, B) 5 (L, L), (L, H), (H, L), (H, H). (b) If VBE(sat) 5 0.8 V and VCE(sat) 5 0.1 V, what is the minimum F required of each BJT for proper operation?
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