Repeat Problem 14.2 using the and 45 nm technologies in Table 1.5 with and 1.0 V respectively. In each case, assume the minimum gate length is used, the gate voltage is , and both source and drain are...

Repeat Problem 14.2 using the and 45 nm technologies in Table 1.5 with and 1.0 V respectively. In each case, assume the minimum gate length is used, the gate voltage is , and both source and drain are at . How do the results compare between technologies?