Question 2. Consider a detector circuit which can take any 6-bit input number. We need to detect whenever input number divisible by either 4 or 6 and generate 1-bit output flag. Explain the number of...

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Extracted text: Question 2. Consider a detector circuit which can take any 6-bit input number. We need to detect whenever input number divisible by either 4 or 6 and generate 1-bit output flag. Explain the number of LUTS will be required to implement this detection circuit in 7-series FPGA. : Please make sure your answer is specific to the question and justify your ansiwers with appropriate explanation