Q6) A hard real time task of 1000 instructions (each instruction is of 1- byte) is running by a processor of 12 CPI (due to cache), with cache, and memory cycle (read or write in the main memory) of...


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Q6) A hard real time task of 1000 instructions (each instruction is of 1-<br>byte) is running by a processor of 12 CPI (due to cache), with cache,<br>and memory cycle (read or write in the main memory) of 10 processor<br>clocks. The deadline of the task is 1 nano sec. 25% of the instructions<br>requested memory access. Statistical observations show that 90% of<br>the memory accesses are for read (from cache), whereas only 10%<br>are for writes (main memory). Determine the minimum processor clock<br>to execute the task within its deadline.<br>

Extracted text: Q6) A hard real time task of 1000 instructions (each instruction is of 1- byte) is running by a processor of 12 CPI (due to cache), with cache, and memory cycle (read or write in the main memory) of 10 processor clocks. The deadline of the task is 1 nano sec. 25% of the instructions requested memory access. Statistical observations show that 90% of the memory accesses are for read (from cache), whereas only 10% are for writes (main memory). Determine the minimum processor clock to execute the task within its deadline.

Jun 05, 2022
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