Q1. Write a code to implement: on 3-,2-, and 1-address machines. Assume the following: (3 x 9.5-28.5 points) A B+(C (D-E)) a. Follow the instruction format mentioned in the lecture notes in terms of source and destination operands. Available operations: ADD, SUB, MULT, MOV, LOAD, and STORE. b. 3- address instructions 1-Address instructions 2-address instructions Q2. Having the following values in the memory and registers: (11 x 6.5-71.5 points) 300 | R. 40 R2 | 550 R3 150 IRA 80 RS 220500 30 Find the result of executing each of the following instructions Assume the instructions are NOT related) and determine: S00 1500 2000 2500 3000 3500 250 400 150 70 . The address mode . The effective address The content of the registers a nd memory 500 0 1500 250 2000 400 2500 150 000 70 500 1 MULT 500,R1,R7 2. SUB R,# 10,2500 500 50 1500 250 2000 400 2500 150 300070 500 3. ADD R3,R1 00 50 1500 250 2000 400 2500 150 3000 70 500 STORE R4,750 (Rind Rind 2750 00 S 1500 250 2000 400 2500 150 000 70 500 . LOAD (R6), R6 500 50 1500 250 000400 2500 150 000 70 500 6. ADD 500,(3500) 500 1500 250 2000 400 2500 150 300070 3500 50 5000 7. SUB R1, 1200(RO), (R6) 500 50 1500 250 2000 400 2500 150 30000 3500 300 R1 40', 550 .. 150 " 80 85220|R& 500-30 8. MULT (2500), 300, R3 500 50 1500250 2000 400 2500 150 3000 70 3500 9. ADD (RO)+, R1 “80 1500 250 2000 2500 150 00070 3500 500 10. SUB -(R1), R2 1500 250 2000 400 2500 150 3000 70 3500 11. MoV 200 (RO), R3 500 50 1500 250 2000 400 2500 150 300070 3500 30040 80 22050030 Computer Architecture ENC 349 Instruction classifications Instruction class Example ADD R1 R2R3 ADD A,B.C ADD Ri.R ADD A,B ADD B.R ADD R ADD (SP)+. (SP) One-and-half-address Zero-address Example Write a code to implement A (B-C)'D on 3-, 2-, 1-, and machines. Assume the following: Follow the previous instruction format in terms of source and destination operands o o Available operations: ADD, SUB, MULT, MOV, LOAD, STORE, PUSH& POP 3-address machine o SUB B, C,A A-BC o MULT D,A, A :A←D"A 2-address machine SUB B, C C-B-C o o MOV D,A AD e 1-address machine oLOAD B o SUB C o MULT D o STORE A AACC B :A#AACC Dr. Asmaa Al Naqi Computer Architecture ENC 349 . 0-address machine o PUSH B o PUSHC o SUB o PUSHD o MULT o POP A Addressing Modes .Addressing modes differ in the way the address information of operands is specified o Immediate addressing o Indexed addressing o Direct (absolute) addressing o Indirect addressing Immediate Mode . The simplest form which includes the operand itself in the instruction (i.e. no address information is needed). .The value of the operand is (immediately) available in the instruction itself. Example: LOAD #1000, R. Ioad the decimal value 1000 into a register RL o The source operand is 1000, while the destination is Ri o 1000 is the operand itself NOT an address. o It is usually to prefix the operands by ( #). Immediate addressing mode is simple. Leads to poor programming practice because a change in the value of an operand requires a change in every instruction that uses the immediate value of such an operand. . Computer Architecture ENC 349 Direct (Absolute) Mode The address of the memory location that holds the operand is included in the instruction Example: LOAD 1000, Ri, load the value of the operand stored in memory location 1000 into register R Direct (absolute) addressing mode provides more flexibility compared to the immedia te mode. Requires the clear presence of the operand address in the instruction. Operation Address Memory Operand Indirect Mode Name of a register or a memory location that holds the (effective) address of the operand is included in the instruction and not the address of the operand. Example: LOAD (1000), Ri, load register Ri with the contents of the memory location whose address is stored at memory address 1000 Two types of indirect addressing: Register indirect addressing: if a register is used to hold the address of operand. Memory indirect addressing: if a memory location is used to hold the address of operand. Computer Architecture ENC 349 Memory Operation Indirect Address (1000) 1000 2002 002 Operand Memory indirect addressing OperationRegister (R) Memory Register (R 3300 Operand 3300 Register indirect addressing Indexed Mode The address of the operand is obtained by adding a constant to the content of a register, called the index register. Example: LOAD X(Rind), Ri, loads register R with the contents of the memory location whose address is the sum of the contents of register Rind and the value X. Indexing requires an additional level of complexity over register indirect addressing. Operation X Memory Index Register Rind operand Computer Architecture ENC 349 Other modes The most commonly used modes in most processors: Immediate, Direct, InDirect, and Indexed. Other modes used in some process tasks: Relative, Autoincrement, Autodecrement. sors to facilitate execution of specific program Dimct Relativ Relative mode .Similar to indexed addressing. Pro gram counter (PC) replaces the index register LOAD X(PC), R Loads Ri with contents of memory location whose address is the sum of (PC)+X Memory Operation Value X Program Counter (PC) operand Computer Architecture ENC 349 Autoincrement mode Memony Similar to register indirect . As the effective address of the operand is the content of a register called auto increment register (Rauto). Regisder R Content of Rauto is the automatically incremented after acceding the operand. 3301 1298 LOAD (Rauto+, R 301 Autodecrement mode Similar to the previous one. Repider R .But, the content of Rauto is decremented first and then the new content is used as the effective3 address of the operand. Regie K LOAD -(Rauto), R