Q1. Design a Shift register which performs:
i) Parallel load function, when input 00 will be applied in S1S0
ii) Shift up function, when input 01 will be applied in S1S0
iii) Shift down function, when input 10 will be applied in S1S0respectively.
iv) No change function, when input 11 will be applied in S1S0
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