Programming Assignment 1 VLSI Floorplanner Design Flow of Integrated Circuits (IC) 1 2 3 4 5 1 2 3 4 5 1 2 3 4 5 1 2 3 4 5 1 2 3 4 5 V H H V Floorplan Model – Slicing Floorplan H: Horizontal cut V:...

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Programming Assignment 1 VLSI Floorplanner Design Flow of Integrated Circuits (IC) 1 2 3 4 5 1 2 3 4 5 1 2 3 4 5 1 2 3 4 5 1 2 3 4 5 V H H V Floorplan Model – Slicing Floorplan H: Horizontal cut V: Vertical cut A non-slicing floorplan. 1 2 3 4 5 ? Floorplan Model – Non-slicing Floorplan Slicing Tree Representation of Slicing Floorplan ․Properties ¾A binary tree (complete) ¾Modules on leave nodes & Cutlines on internal nodes ¾1D expression by postfix traversal Postfix expression: 12H345HHV 1 2 H 1 2 3 4 V 3 4 (a) Postfix expression: 12H (b) Postfix expression: 34V H 1 2 W12 W12= max(W1 , W2) H12= H1 + H2 W34 = W3 + W4 H34 = max(H3 , H4) H 3 4 W34 Packing from a Postfix Expression ․Binary operator ¾H: maximum on width and summation on height ¾V: maximum on height and summation on width 1 2 H 1 23 4 V 3 4 V H 1 23 4 W1234 W1234 = W12 + W34 H1234 = max(H12 , H34) (c) Postfix expression: 12H34VV ․Binary operator ¾H: maximum on width and summation on height ¾V: maximum on height and summation on width Packing Two Sub-floorplans Recursively (I) 1 2 3 4 H 1 23 4 W1234 H 1 2 V 3 4 H (d) Postfix expression: 12H34VH W1234 = max(W12 + W34) H1234 = H12 + H34 Packing Two Sub-floorplans Recursively (II) ․Binary operator ¾H: maximum on width and summation on height ¾V: maximum on height and summation on width Floorplan Optimization ․Area minimization is the top priority! ․Simulated Annealing (SA) ¾Randomly modify the slicing tree and select the one with the minimum floorplan area ¾We have provided you this optimization engine 1. Generate an initial slicing tree T 2. Calculate the area of the slicing tree T 3. Generate a random neighboring solution by changing the tree 4. Calculate the cost of the new neighboring solution 5. Compare them: if new_area < old_area, then move to the new solution else accept the new solution with a user-defined probability 6. repeat steps 3-5 above until an acceptable solution is found todo task 1: generating an initial slicing tree ․init_slicing_tree ¾initialize a left-skewed slicing tree v 2 1 v node address left right parent module cutline 0x10 0x20 0x30 null null v 0x20 0x40 0x50 0x10 null v 0x30 null null 0x10 1 undefined_cutline 0x40 0x60 0x70 0x20 null v 0x50 null null 0x20 2 undefined_cutline v 4 3 0x10 0x20 0x30 0x500x40 0x60 0x70 typedef struct node { module_t* module; cutline_t cutline; struct node* parent; struct node* left; struct node* right; }node_t; (a) circuit1.txt (b) circuit4.txt initial floorplan h 1 2 v 3 4 v 0x30 0x60 0x700x40 0x50 0x20 0x10 nth 0 1 2 3 4 5 6 expression unit 1 2 h 3 4 v v node address 0x40 0x50 0x20 0x60 0x70 0x30 0x10 postfix traversal algorithm 1. traverse the left subtree by recursively calling the postfix function. 2. traverse the right subtree by recursively calling the postfix function. 3. process the data part of root element (or current element). todo task 2: postfix traversal algorithm ․get_expression ¾perform the postfix traversal ¾get the postfix expression of the slicing tree h 1 2 v 3 4 v operation: recut h 1 2 v 3 4 h todo task 3: tree modifier – rotate and recut ․rotate ¾swap the height and the width of a module from a leave node ․recut ¾change the cutline of an internal node todo task 3: tree modifier – swap_module ․swap_module ¾swap two modules from two leave nodes ¾simply swap the pointer value ¾do not modify the node links h 1 2 v 3 4 v h 1 4 v 3 2 v operation: swap_module todo task 4: tree modifier – swap_topology ․swap_topology ¾swap two subtrees rooted at two given node pointers ¾modify the node links appropriately h 1 2 v 3 4 v h 1 v v 3 4 2 operation: swap_topology example of swap_topology h 1 2 v 3 4 v 0x30 0x60 0x700x40 0x50 0x20 0x10 swap_topology (0x40, 0x30) h 1 2v 3 4 v 0x30 0x60 0x70 0x40 0x50 0x20 0x10 node address left right parent module cutline 0x10 0x20 0x40 null null v 0x20 0x30 0x50 0x10 null h 0x30 0x60 0x70 0x20 null v 0x40 null null 0x10 1 undefined_cutline 0x60 null null 0x30 3 undefined_cutline h 1 2 v 3 4 v h 1 2 v 3 4 h h 1 4 v 3 2 hh 1 h v 3 4 2 recut swap_module swap_topology example of a sequence of tree modifiers todo items 1. log in the cade server: lab2-20.eng.utah.edu • cade server has all required files installed already • you may use nomachine or ssh • if you want to work on your own “linux” machine, install cairo library following instructions at: https://www.cairographics.org/download/ 2. clone the class github • git clone https://github.com/tsung-wei-huang/ece5960 3. enter the folder ece5960/hw/hw1/ 4. hit “make” to compile all sources 5. an executable “floorplan” will be present in the folder 6. usage: ./floorplan circuits/circuit1.txt circuit1.png • replace the number “1” with others to run different circuits 7. a default scoring output will be printed in the console • maximum score is 90 • 10 points are saved for documentation 8. finish all todo sections in floorplan.c; this is the only file you need to work on 9. email me your floorplan.c together with your uid and name by 3:30 pm 2/27 (before class) https://www.cairographics.org/download/ https://github.com/tsung-wei-huang/ece5960 ~$ git clone https://github.com/tsung-wei-huang/ece5960.git ~$ cd ece5960/hw/hw1 ~$ make ~$ ./floorplan circuits/circuit1.txt circuit.png demo ********************************** hw1 ********************************** initial slicing tree: root=0xa7d0d0, num_nodes=7, num_modules=4 initial expression: 32v1v0v initial area: 498760.000000 perform optimization... module 0 is placed at (0, 0) with height=280 and width=296 module 1 is placed at (523, 296) with height=188 and width=333 module 2 is placed at (0, 296) with height=192 and width=523 module 3 is placed at (296, 0) with height=296 and width=549 packing area = 417728.000000 (has overlapped? 0 (1:yes, 0:no)) draw floorplan to circuit1.png ********************************** end *********************************** ****************************** verification ****************************** circuit: 4 golden_modules, slicing tree size = 4 leaves and 3 internals (1) function 'init_slicing_tree': correct! +25 (2) function 'is_leave' : correct! +5 (3) function 'is_internal' : correct! +5 (4) function 'is_in_subtree' : correct! +10 (5) procedure 'rotate' : correct! +5 (6) procedure 'recut' : correct! +5 (7) procedure 'swap_module' : correct! +5 (8) procedure 'swap_topology' : correct! +10 (9) procedure 'get_expression' : correct! +20 your final score for this mp : 90 **************************** end verification **************************** old_area,="" then="" move="" to="" the="" new="" solution="" else="" accept="" the="" new="" solution="" with="" a="" user-defined="" probability="" 6.="" repeat="" steps="" 3-5="" above="" until="" an="" acceptable="" solution="" is="" found="" todo="" task="" 1:="" generating="" an="" initial="" slicing="" tree="" ․init_slicing_tree="" ¾initialize="" a="" left-skewed="" slicing="" tree="" v="" 2="" 1="" v="" node="" address="" left="" right="" parent="" module="" cutline="" 0x10="" 0x20="" 0x30="" null="" null="" v="" 0x20="" 0x40="" 0x50="" 0x10="" null="" v="" 0x30="" null="" null="" 0x10="" 1="" undefined_cutline="" 0x40="" 0x60="" 0x70="" 0x20="" null="" v="" 0x50="" null="" null="" 0x20="" 2="" undefined_cutline="" v="" 4="" 3="" 0x10="" 0x20="" 0x30="" 0x500x40="" 0x60="" 0x70="" typedef="" struct="" node="" {="" module_t*="" module;="" cutline_t="" cutline;="" struct="" node*="" parent;="" struct="" node*="" left;="" struct="" node*="" right;="" }node_t;="" (a)="" circuit1.txt="" (b)="" circuit4.txt="" initial="" floorplan="" h="" 1="" 2="" v="" 3="" 4="" v="" 0x30="" 0x60="" 0x700x40="" 0x50="" 0x20="" 0x10="" nth="" 0="" 1="" 2="" 3="" 4="" 5="" 6="" expression="" unit="" 1="" 2="" h="" 3="" 4="" v="" v="" node="" address="" 0x40="" 0x50="" 0x20="" 0x60="" 0x70="" 0x30="" 0x10="" postfix="" traversal="" algorithm="" 1.="" traverse="" the="" left="" subtree="" by="" recursively="" calling="" the="" postfix="" function.="" 2.="" traverse="" the="" right="" subtree="" by="" recursively="" calling="" the="" postfix="" function.="" 3.="" process="" the="" data="" part="" of="" root="" element="" (or="" current="" element).="" todo="" task="" 2:="" postfix="" traversal="" algorithm="" ․get_expression="" ¾perform="" the="" postfix="" traversal="" ¾get="" the="" postfix="" expression="" of="" the="" slicing="" tree="" h="" 1="" 2="" v="" 3="" 4="" v="" operation:="" recut="" h="" 1="" 2="" v="" 3="" 4="" h="" todo="" task="" 3:="" tree="" modifier="" –="" rotate="" and="" recut="" ․rotate="" ¾swap="" the="" height="" and="" the="" width="" of="" a="" module="" from="" a="" leave="" node="" ․recut="" ¾change="" the="" cutline="" of="" an="" internal="" node="" todo="" task="" 3:="" tree="" modifier="" –="" swap_module="" ․swap_module="" ¾swap="" two="" modules="" from="" two="" leave="" nodes="" ¾simply="" swap="" the="" pointer="" value="" ¾do="" not="" modify="" the="" node="" links="" h="" 1="" 2="" v="" 3="" 4="" v="" h="" 1="" 4="" v="" 3="" 2="" v="" operation:="" swap_module="" todo="" task="" 4:="" tree="" modifier="" –="" swap_topology="" ․swap_topology="" ¾swap="" two="" subtrees="" rooted="" at="" two="" given="" node="" pointers="" ¾modify="" the="" node="" links="" appropriately="" h="" 1="" 2="" v="" 3="" 4="" v="" h="" 1="" v="" v="" 3="" 4="" 2="" operation:="" swap_topology="" example="" of="" swap_topology="" h="" 1="" 2="" v="" 3="" 4="" v="" 0x30="" 0x60="" 0x700x40="" 0x50="" 0x20="" 0x10="" swap_topology="" (0x40,="" 0x30)="" h="" 1="" 2v="" 3="" 4="" v="" 0x30="" 0x60="" 0x70="" 0x40="" 0x50="" 0x20="" 0x10="" node="" address="" left="" right="" parent="" module="" cutline="" 0x10="" 0x20="" 0x40="" null="" null="" v="" 0x20="" 0x30="" 0x50="" 0x10="" null="" h="" 0x30="" 0x60="" 0x70="" 0x20="" null="" v="" 0x40="" null="" null="" 0x10="" 1="" undefined_cutline="" 0x60="" null="" null="" 0x30="" 3="" undefined_cutline="" h="" 1="" 2="" v="" 3="" 4="" v="" h="" 1="" 2="" v="" 3="" 4="" h="" h="" 1="" 4="" v="" 3="" 2="" hh="" 1="" h="" v="" 3="" 4="" 2="" recut="" swap_module="" swap_topology="" example="" of="" a="" sequence="" of="" tree="" modifiers="" todo="" items="" 1.="" log="" in="" the="" cade="" server:="" lab2-20.eng.utah.edu="" •="" cade="" server="" has="" all="" required="" files="" installed="" already="" •="" you="" may="" use="" nomachine="" or="" ssh="" •="" if="" you="" want="" to="" work="" on="" your="" own="" “linux”="" machine,="" install="" cairo="" library="" following="" instructions="" at:="" https://www.cairographics.org/download/="" 2.="" clone="" the="" class="" github="" •="" git="" clone="" https://github.com/tsung-wei-huang/ece5960="" 3.="" enter="" the="" folder="" ece5960/hw/hw1/="" 4.="" hit="" “make”="" to="" compile="" all="" sources="" 5.="" an="" executable="" “floorplan”="" will="" be="" present="" in="" the="" folder="" 6.="" usage:="" ./floorplan="" circuits/circuit1.txt="" circuit1.png="" •="" replace="" the="" number="" “1”="" with="" others="" to="" run="" different="" circuits="" 7.="" a="" default="" scoring="" output="" will="" be="" printed="" in="" the="" console="" •="" maximum="" score="" is="" 90="" •="" 10="" points="" are="" saved="" for="" documentation="" 8.="" finish="" all="" todo="" sections="" in="" floorplan.c;="" this="" is="" the="" only="" file="" you="" need="" to="" work="" on="" 9.="" email="" me="" your="" floorplan.c="" together="" with="" your="" uid="" and="" name="" by="" 3:30="" pm="" 2/27="" (before="" class)="" https://www.cairographics.org/download/="" https://github.com/tsung-wei-huang/ece5960="" ~$="" git="" clone="" https://github.com/tsung-wei-huang/ece5960.git="" ~$="" cd="" ece5960/hw/hw1="" ~$="" make="" ~$="" ./floorplan="" circuits/circuit1.txt="" circuit.png="" demo="" **********************************="" hw1="" **********************************="" initial="" slicing="" tree:="" root="0xa7d0d0," num_nodes="7," num_modules="4" initial="" expression:="" 32v1v0v="" initial="" area:="" 498760.000000="" perform="" optimization...="" module="" 0="" is="" placed="" at="" (0,="" 0)="" with="" height="280" and="" width="296" module="" 1="" is="" placed="" at="" (523,="" 296)="" with="" height="188" and="" width="333" module="" 2="" is="" placed="" at="" (0,="" 296)="" with="" height="192" and="" width="523" module="" 3="" is="" placed="" at="" (296,="" 0)="" with="" height="296" and="" width="549" packing="" area="417728.000000" (has="" overlapped?="" 0="" (1:yes,="" 0:no))="" draw="" floorplan="" to="" circuit1.png="" **********************************="" end="" ***********************************="" ******************************="" verification="" ******************************="" circuit:="" 4="" golden_modules,="" slicing="" tree="" size="4" leaves="" and="" 3="" internals="" (1)="" function="" 'init_slicing_tree':="" correct!="" +25="" (2)="" function="" 'is_leave'="" :="" correct!="" +5="" (3)="" function="" 'is_internal'="" :="" correct!="" +5="" (4)="" function="" 'is_in_subtree'="" :="" correct!="" +10="" (5)="" procedure="" 'rotate'="" :="" correct!="" +5="" (6)="" procedure="" 'recut'="" :="" correct!="" +5="" (7)="" procedure="" 'swap_module'="" :="" correct!="" +5="" (8)="" procedure="" 'swap_topology'="" :="" correct!="" +10="" (9)="" procedure="" 'get_expression'="" :="" correct!="" +20="" your="" final="" score="" for="" this="" mp="" :="" 90="" ****************************="" end="" verification="">
Answered Same DayFeb 26, 2021

Answer To: Programming Assignment 1 VLSI Floorplanner Design Flow of Integrated Circuits (IC) 1 2 3 4 5 1 2 3 4...

Arun Shankar answered on Feb 27 2021
143 Votes
#include "floorplan.h"
/*This program will try to use tree to organize shapes in sush a way as the rectangles are organized in a bigger reactangle
This is very important to circuits designs and organizing things on silicon The trees will be sliced.*/
// Global variables. The global variables will be effectice after the input has been parsed
// by calling the procedure read_module.
int num_modules; // # of input modules.
module_t* modules; // Array for modules.
// Procedure: floorplan
// The major procedure of the floorplan. The procedure concists of the f
ollowing major steps:
// - initialize the slicing tree.
// - print the information of the slicing tree.
// - perform the optimization process.
void floorplan(const char file[], const char outfile[]) {

printf("\n********************************** HW1 ***********************************\n");
// Read the modules from the given input file.
read_modules(file);
// Initialize the slicing tree.
node_t* root = init_slicing_tree(NULL, 0);
int num_nodes = (num_modules << 1) - 1;
printf("Initial slicing tree: Root=%p, num_nodes=%d, num_modules=%d\n", root, num_nodes, num_modules);
// Obtain the expression of the initial slicing tree.
expression_unit_t* expression = (expression_unit_t*)calloc(num_nodes, sizeof(expression_unit_t));
get_expression(root, num_nodes, expression);
printf("Initial expression: ");
pnt_expression(expression, num_nodes);
double area = packing(expression, num_nodes);
printf("Initial area: %.5e\n", area);
draw_modules("init.png");
free(expression);
// Perform the optimization process.
printf("Perform optimization...\n");
area = optimize(root, num_nodes);
pnt_modules();
printf("Packing area = %.5e (has overlapped? %d (1:yes, 0:no))\n", area, is_overlapped());
// Output your floorplan.
printf("Draw floorplan to %s\n", outfile);
draw_modules(outfile);

printf("********************************** END ***********************************\n");
}
///////////////////////////////////////////////////////////////////////////////////////////////////
// FUNCTIONS/PROCEDURES YOU HAVE TO FINISH. //
///////////////////////////////////////////////////////////////////////////////////////////////////
// Function: is_leaf_node
// Return 1 if the given slicing tree node is a leaf node, and 0 otherwise.
int is_leaf_node(node_t* ptr)
{
// TODO: (remember to modify the return value appropriately) - DONE
if((ptr->left==nullptr) && (ptr->right==nullptr))
return 1;
return 0;
}
// Function: is_internal_node
// Return 1 if the given slicing tree node is an internal node, and 0 otherwise.
int is_internal_node(node_t* ptr)
{
// TODO: (remember to modify the return value appropriately) - DONE
if(is_leaf_node(ptr)==1)
return 0;
return 1;
}
// Function: is_in_subtree
// Return 1 if the given subtree rooted at node 'b' resides in the subtree rooted at node 'a'.
int is_in_subtree(node_t* a, node_t* b)
{
// TODO: (remember to modify the return value appropriately) - DONE
if((b->module == a->module)&&(b->cutline==a->cutline))
return 1;

if(is_in_subtree(a->left,b))
return 1;
return is_in_subtree(a->right,b);
}
// Procedure: rotate
// Rotate a module from a given leaf node of the slicing tree by 90 degree. That is, the height
// and the width of the modules are swapped.
void rotate(node_t* ptr)
{
// TODO: DONE Rotate the module, swapping the width and height.
module_t* m = ptr->module;
if(m=nullptr)
return;
int temp = m->w;
m->w = m->h;
m->h = temp;
}
// Procedure: recut
// Change the cutline of a module in a given internal node of the slicing tree.
// If the original cutline is a vertical cutline, the resulting cutline should be changed to
// horizontal and vice versa.
void recut(node_t* ptr)
{
if(!is_internal_node(ptr)) return;
assert(ptr->module == NULL && ptr->cutline != UNDEFINED_CUTLINE);
// TODO: - DONE
if(ptr->cutline==V)
ptr->cutline = H;
else if(ptr->cutline==H)
ptr->cutline = V;
return;
}
// Procedure: swap_module
// Swap the two modules between two given leaf nodes in the slicing tree.
void swap_module(node_t* a, node_t* b)
{
if(!is_leaf_node(a) || !is_leaf_node(b)) return;
assert(a->module != NULL && a->cutline == UNDEFINED_CUTLINE);
assert(b->module != NULL && b->cutline == UNDEFINED_CUTLINE); //if undefined cutline, then the modules are numbers
// TODO: - DONE
module_t* temp = a->module;
a->module = b->module;
b->module = temp;
}
// Procedure: swap_topology
// Swap the topology of two subtrees rooted at two given nodes of the slicing tree.
// The procedure applies "is_in_subtree" first to tell if any of the subtree belongs
// to a part of the other.
void swap_topology(node_t* a, node_t* b)
{
if(a == NULL || b == NULL) return;
if(a->parent == NULL || b->parent == NULL) return;
if(is_in_subtree(a, b) || is_in_subtree(b, a)) return;
assert(a->parent != NULL && b->parent != NULL);

// TODO: - DONE
node_t* ap = a->parent;
node_t* bp = b->parent;
a->parent = bp;
b->parent = ap;
}
// Procedure: get_expression
// Perform the post-order traversal on the given slicing tree and stores the polish expression
// into the given expression array. You should assume the expression array is pre-allocated with
// size N. In other words, you don't have to perform dynamic memory allocation. In fact, there
// is no need for you to add any code here, but it would be better if you can understand the
// details of this procedure especially the last two lines where the procedure postfix_traversal
// is called internally to obtain the expression.
void get_expression(node_t* root, int N, expression_unit_t* expression) {
int i;
// Clear the expression.
for(i=0; i expression[i].module = NULL;
expression[i].cutline = UNDEFINED_CUTLINE;
}
// Obtain the expression using the postfix traversal.
int nth = 0;
postfix_traversal(root, &nth, expression);
}
// Procedure: postfix_traversal
// Perform the postfix traversal on the slicing tree and store the corresponding polish expression
// to the given expression array. You should use the pointer "nth" to find out the index of the
// expression array and write the data accordingly. Notice that...
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