Memory access in RISC architecture is limited to instructions of the type Select one: a.STA and LDA b.MOV and JMP c.PUSH and POP d.CALL and RET OO OO

Extracted text: Memory access in RISC architecture is limited to instructions of the type Select one: a.STA and LDA b.MOV and JMP c.PUSH and POP d.CALL and RET OO OO


Extracted text: A program runs in 15 seconds on computer X, which has a 2 Ghz clock. You are required to help a computer designer to build another computer, Y, that will run the program in 10 seconds. The designer has determined that a substantial increase in the clock rate is possible, but this increase will affect the rest of the CPU design, causing computer Y to require 1.5 times as many clock cycles as computer for this program. What clock rate should you tell the designer to target? Select one: a.0.3 Ghz b.3 Ghz c.9 Ghz d.8 Ghz