Is explicitly parallel instruction computing (EPIC) the same thing as a VLIW architecture? Explain why or why not. What do we mean when we say that interrupts must be processed transparently? What...

Is explicitly parallel instruction computing (EPIC) the same thing as a VLIW architecture? Explain why or why not. What do we mean when we say that interrupts must be processed transparently? What does this involve and why is it necessary? Explain the function of a watchdog timer. Why do embedded control processors usually need this type of mechanism?