Introduction Your task for this lab is to write a program that extends the simulation of the ARM processor and includes stack operations. The program will have an array that represents the general ARM...

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Introduction


Your task for this lab is to write a program that extends the simulation of the ARM processor and includes stack operations.


The program will have an array that represents the general ARM registers, and a second multi-dimensional array that represents memory. The program must also have allocated stack space within the memory array.


The program will read content into the memory array from a file, execute the instructions it finds in the array one instruction at a time, and print the contents of the registers (including a program counter) and stack after each instruction. Note, when printing the stack do not print anything below the stack pointer, or above your stack base.



  1. The program will implement the following instructions: ADD, ADDI, SUBI, LDUR, STUR, B, BL, BR. And at least on Conditional Branch instruction.

  2. Instructions in memory will use the assembly mnemonics rather than binary op codes.

  3. Instruction arguments will be register aliases (ex. X0, X1, X2, …) memory locations in the memory array (100, 104, …), or immediate values (#-3, #5, #0, …).

  4. The program should use the specific address - 200, as the default address for the start instructions in memory.

  5. Load and store instructions will only use indirect addressing (ie. [Xn, #nn] ).

  6. Branch instructions will use immediate or register addressing.

  7. The program can limit the number of registers available for use in the program. At least 8 must be available, including X0, X1, X9, X10, SP (X28), LR (X30). Additional registers may be implemented.

  8. Data will be signed integers.

  9. The Stack:

    1. The stack must be at least 100 words deep. Make sure your stack will not grow over your program/data area.

    2. The program must have a check and a “Ran out of Stack Space/Stack Overflow” error message.

    3. Choose a high memory area for the stack.

    4. The stack should grow down.

    5. Stack memory locations should be on double word boundaries (increment/decrement by 8).

    6. Remember to initiate the stack pointer (SP) to the top of the stack.



  10. Use BR XZR to halt the program.



Test Files:


Students will create an input file to test their emulator. The program must be able to read the name of the file as an argument. Students may include a default filename for use if the argument is not used.


The instructions in the file to be executed must include:



  • At least one example of each instruction implemented.

  • At least 12 instructions.

  • Instructions to complete at least one loop.

  • At least one push and pop on the stack.

  • At least one function call.



Output


The output of the program will be a listing showing:



  • The current instruction

  • The values of any registers used in that instruction. Including the Program Counter.

  • The portion of the stack which is in use – (note: this may be limited to the current stack frame).

  • Additional information, such as the value of all registers, or other useful items may be shown as well.



SAMPLE OUTPUT


Instruction executed: LDUR X0, XZR, #100


Registers: X0 = 512, SP=1000, PC=204*


Stack: 1000: 98 ***


Hit enter for next instruction: >


Instruction executed: SUBI SP, SP, #8


Registers: SP=992, PC=208


Stack: 1000: 98



992: **


Hit enter for next instruction:>


Instruction executed: STUR X0, [SP, #0]


Registers: X0 = 512, SP=992, PC=212


Stack: 1000: 4A



992: 512


Hit enter for next instruction: >


*note: only registers affected need be displayed, or alternately, only a subset consisting of the registers used in the program – or available for use in the program need to be displayed.


**note: this is blank as nothing has been put there yet.


***note: The used portion of the stack needs to be displayed, but not unused portions.


arm2-eetr3bwd.c img-1227-yicgdsnd.jpg code2-hy4obxte.txt
Answered 8 days AfterOct 31, 2021

Answer To: Introduction Your task for this lab is to write a program that extends the simulation of the ARM...

Swapnil answered on Nov 01 2021
117 Votes
95124/code.txt
100 512 0 0 0
104 24 0 0 0
108 22 0 0 0
200 ADDI X0, XZR, #100
204 LDUR X9, [X0, #0]
208 SUBI SP, SP, #8
212 STUR X0, [SP, #0]
216 ADDI X0, X0, #4
220 LDUR X10, [X0, #4]
224 ADD X9, X9, X10
228 SUBI SP, SP, #800
95124/code1.txt
100 256 0 0 0 0
104 0 0 0 0 0
108 16 0 0 0 0
200 ADDI X3, XZR, #100
204 LDUR X1, [X3, #0]
208 LDUR X2, [X3, #8]
212 SUBI SP, SP, #16
216 STUR X2, [SP, #8]
220 STUR X1, [SP, #0]
224 BL 248
228 LDUR X2, [SP, #0]
232 LDUR X3, [SP, #8]
236 ADDI SP, SP, #16
240 STUR X1, [SP, #0]
244 BR XZR
248 ADD X1, XZR, XZR
252 LDUR X2, [SP, #0]
256 LDUR X3, [SP, #8]
260 SUB X2, X2, X3
264 ADDI X1, X1, #1
268 CBZ X2, 276, 0
272 B 260, 0, 0
276 BR LR, 0, 0
95124/output.txt
INSTRUCTION: ADDI X3, XZR, #100
Registers:
X3 = 100 SP = 1192 LR = 0 PC = 204
Stack:
1192 :
INSTRUCTION: LDUR X1, [X3, #0]
Registers:
X1 = 256 X3 = 100 SP = 1192 LR = 0 PC = 208
Stack:
1192 :
INSTRUCTION: LDUR X2, [X3, #8]
Registers:
X1 = 256 X2 = 16 X3 = 100 SP = 1192 LR = 0 PC = 212
Stack:
1192 :
INSTRUCTION: SUBI SP, SP, #16
Registers:
X1 = 256 X2 = 16 X3 = 100 SP = 1176 LR = 0 PC = 216
Stack:
1192 :
1184 :
1176 :
INSTRUCTION: STUR X2, [SP, #8]
Registers:
X1 = 256 X2 = 16 X3 = 100 SP = 1176 LR = 0 PC = 220
Stack:
1192 :
1184 : 16
1176 :
INSTRUCTION: STUR X1, [SP, #0]
Registers:
X1 = 256 X2 = 16 X3 = 100 SP = 1176 LR = 0 PC = 224
Stack:
1192 :
1184 : 16
1176 : 256
INSTRUCTION: BL 248
, [SP, #0]
Registers:
X1 = 256 X2 = 16 X3 = 100 SP = 1176 LR = 228 PC = 248
Stack:
1192 :
1184 : 16
1176 : 256
INSTRUCTION: ADD X1, XZR, XZR
Registers:
X2 = 16 X3 = 100 SP = 1176 LR = 228 PC = 252
Stack:
1192 :
1184 : 16
1176 : 256
INSTRUCTION: LDUR X2, [SP, #0]
Registers:
X2 = 256 X3 = 100 SP = 1176 LR = 228 PC = 256
Stack:
1192 :
1184 : 16
1176 : 256
INSTRUCTION: LDUR X3, [SP, #8]
Registers:
X2 = 256 X3 = 16 SP = 1176 LR = 228 PC = 260
Stack:
1192 :
1184 : 16
1176 : 256
INSTRUCTION: SUB X2, X2, X3
Registers:
X2 = 240 X3 = 16 SP = 1176 LR = 228 PC = 264
Stack:
1192 :
1184 : 16
1176 : 256
INSTRUCTION: ADDI X1, X1, #1
Registers:
X1 = 1 X2 = 240 X3 = 16 SP = 1176 LR = 228 PC = 268
Stack:
1192 :
1184 : 16
1176 : 256
INSTRUCTION: CBZ X2, 276, 0
Registers:
X1 = 1 X2 = 240 X3 = 16 SP = 1176 LR = 228 PC = 272
Stack:
1192 :
1184 : 16
1176 : 256
INSTRUCTION: B 260, 0, 0
Registers:
X1 = 1 X2 = 240 X3 = 16 SP = 1176 LR = 228 PC = 260
Stack:
1192 :
1184 : 16
1176 : 256
INSTRUCTION: SUB X2, X2, X3
Registers:
X1 = 1 X2 = 224 X3 = 16 SP = 1176 LR = 228 PC = 264
Stack:
1192 :
1184 : 16
1176 : 256
INSTRUCTION: ADDI X1, X1, #1
Registers:
X1 = 2 X2 = 224 X3 = 16 SP = 1176 LR = 228 PC = 268
Stack:
1192 :
1184 : 16
1176 : 256
INSTRUCTION: CBZ X2, 276, 0
Registers:
X1 = 2 X2 = 224 X3 = 16 SP = 1176 LR = 228 PC = 272
Stack:
1192 :
1184 : 16
1176 : 256
INSTRUCTION: B 260, 0, 0
Registers:
X1 = 2 X2 = 224 X3 = 16 SP = 1176 LR = 228 PC = 260
Stack:
1192 :
1184 : 16
1176 : 256
INSTRUCTION: SUB X2, X2, X3
Registers:
X1 = 2 X2 = 208 X3 = 16 SP = 1176 LR = 228 PC = 264
Stack:
1192 :
1184 : 16
1176 : 256
INSTRUCTION: ADDI X1, X1, #1
Registers:
X1 = 3 X2 = 208 X3 = 16 SP = 1176 LR = 228 PC = 268
Stack:
1192 :
1184 : 16
1176 : 256
INSTRUCTION: CBZ X2, 276, 0
Registers:
X1 = 3 X2 = 208 X3 = 16 SP = 1176 LR = 228 PC = 272
Stack:
1192 :
1184 : 16
1176 : 256
INSTRUCTION: B 260, 0, 0
Registers:
X1 = 3 X2 = 208 X3 = 16 SP = 1176 LR = 228 PC = 260
Stack:
1192 :
1184 : 16
1176 : 256
INSTRUCTION: SUB X2, X2, X3
Registers:
X1 = 3 X2 = 192 X3 = 16 SP = 1176 LR = 228 PC = 264
Stack:
1192 :
1184 : 16
1176 : 256
INSTRUCTION: ADDI X1, X1, #1
Registers:
X1 = 4 X2 = 192 X3 = 16 SP = 1176 LR = 228 PC = 268
Stack:
1192 :
1184 : 16
1176 : 256
INSTRUCTION: CBZ X2, 276, 0
Registers:
X1 = 4 X2 = 192 X3 = 16 SP = 1176 LR = 228 PC = 272
Stack:
1192 :
1184 : 16
1176 : 256
INSTRUCTION: B 260, 0, 0
Registers:
X1 = 4 X2 = 192 X3 = 16 SP = 1176 LR = 228 PC = 260
Stack:
1192 :
1184 : 16
1176 : 256
INSTRUCTION: SUB X2, X2, X3
Registers:
X1 = 4 X2 = 176 X3 = 16 SP = 1176 LR = 228 PC = 264
Stack:
1192 :
1184 : 16
1176 : 256
INSTRUCTION: ADDI X1, X1, #1
Registers:
X1 = 5 X2 = 176 X3 = 16 SP = 1176 LR = 228 PC = 268
Stack:
1192 :
1184 : 16
1176 : 256
INSTRUCTION: CBZ X2, 276, 0
Registers:
X1 = 5 X2 = 176 X3 = 16 SP = 1176 LR = 228 PC = 272
Stack:
1192 :
1184 : 16
1176 : 256
INSTRUCTION: B 260, 0, 0
Registers:
X1 = 5 X2 = 176 X3 = 16 SP = 1176 LR = 228 PC = 260
Stack:
1192 :
1184 : 16
1176 : 256
INSTRUCTION: SUB X2, X2, X3
Registers:
X1 = 5 X2 = 160 X3 = 16 SP = 1176 LR = 228 PC = 264
Stack:
1192 :
1184 : 16
1176 : 256
INSTRUCTION: ADDI X1, X1, #1
Registers:
X1 = 6 X2 = 160 X3 = 16 SP = 1176 LR = 228 PC = 268
Stack:
1192 :
1184 : 16
1176 : 256
INSTRUCTION: CBZ X2, 276, 0
Registers:
X1 = 6 X2 = 160 X3 = 16 SP = 1176 LR = 228 PC = 272
Stack:
1192 :
1184 : 16
1176 : 256
INSTRUCTION: B 260, 0, 0
Registers:
X1 = 6 X2 = 160 X3 = 16 SP = 1176 LR = 228 PC = 260
Stack:
1192 :
1184 : 16
1176 : 256
INSTRUCTION: SUB X2, X2, X3
Registers:
X1 = 6 X2 = 144 X3 = 16 SP = 1176 LR = 228 PC = 264
Stack:
1192 :
1184 : 16
1176 : 256
INSTRUCTION: ADDI X1, X1, #1
Registers:
X1 = 7 X2 = 144 X3 = 16 SP = 1176 LR = 228 PC = 268
Stack:
1192 :
1184 : 16
1176 : 256
INSTRUCTION: CBZ X2, 276, 0
Registers:
X1 = 7 X2 = 144 X3 = 16 SP = 1176 LR = 228 PC = 272
Stack:
1192 :
1184 : 16
1176 : 256
INSTRUCTION: B 260, 0, 0
Registers:
X1 = 7 X2 = 144 X3 = 16 SP = 1176 LR = 228...
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