In the test circuit of let VSD 5 2 V, and let vSG be variable from 0 to 5 V. (a) Assuming the FET has Vt 5 21.0 V, k 5 2.0 mA/V2 , 5 0.46 V1y2 , n 5 0.35 V, and 5 0, sketch and label the plot of iD...

In the test circuit of let VSD 5 2 V, and let vSG be variable from 0 to 5 V. (a) Assuming the FET has Vt 5 21.0 V, k 5 2.0 mA/V2 , 5 0.46 V1y2 , n 5 0.35 V, and 5 0, sketch and label the plot of iD versus vSG if VBS 5 0. (b) Repeat, but with VBS 5 3 V. Compare the two curves, and comment. Hint: as vSG is varied from 0 to 5 V, the MOSFET goes from cutoff, to the saturation mode, to the triode mode.