In the CMOS circuit of let VDD 5 2VSS 5 2.5 V and let the FETs have Vt n 5 0.5 V, Vt p 5 20.4 V, k1 5 k2 5 2 mA/V2 , k3 5 k4 5 k5 5 k6 5 1 mA/V2 , n 5 1y(30 V), p 5 1y(25 V), and n 5 0.1. (a) Specify R so that adm 5 80 V/V. What is the value of the CMRR? Hint: develop an expression for adm as a function of ISS. (b) If the input terminals are tied together and driven by a common voltage vIC , what is the permissible input voltage range? What is the permissible output voltage range for vIC 5 0 V?
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