In the circuit of Fig. P4.94 both the differential pair and the active load have been cascoded in order to raise the output resistance Ro and thus the unloaded gain adm. Specifi cally, the SC pair...

In the circuit of Fig. P4.94 both the differential pair and the active load have been cascoded in order to raise the output resistance Ro and thus the unloaded gain adm. Specifi cally, the SC pair M1-M2 is cascoded by the CG pair M5-M6, and the mirror pair M3-M4 is cascoded by the CG pair M7-M8. The function of the VBIAS source, whose details are beyond our present scope, is to bias the M5-M6 pair so as to keep M1 and M2 at the edge of saturation (EOS) over the entire common-mode input range.

(a)Obtain an expression for adm in terms of the gms and the lambdas of the FETs. Hence, show that if all FETs have the same values of k and , then, so long as the condition gmro @ 1 holds, the circuit gives, assuming  5 0, a dm > 2y( V OV) 2 , where VOV is the overdrive voltage required to sustain the current ISSy2. (b) Calculate adm and CMRR if k 5 1 mA/V2 and 5 1y(20 V), and the biasing network sinks ISS 5 0.25 mA with RSS 5 80 kV. (c) Specify a suitable value for VBIAS if Vt 5 0.4 V.