In Fig. P2.76, Q1 and Q2 are matched BJTs. Q1 is operated in the CB mode, and Q2 in the diode mode. The function of Q2 is to bias the base of Q1 at about 10.7 V, and thus ensure a dc voltage of 0 V at...

In Fig. P2.76, Q1 and Q2 are matched BJTs. Q1 is operated in the CB mode, and Q2 in the diode mode. The function of Q2 is to bias the base of Q1 at about 10.7 V, and thus ensure a dc voltage of 0 V at the emitter of Q1, which in the CB mode represents the input node. An input dc level of 0 V is highly desirable as it allows us to couple the signal source to the amplifi er directly, without the need for any ac-coupling, dc-blocking capacitors. Moreover, the circuit works all the way down to low frequencies, including zero, or dc. For this scheme to work, we must have VBE2 5 VEB1. This can be achieved, for instance, if we use BJTs with matched values of Is and we bias them identically by letting R2 5 R1. In the circuit shown, the CB stage is used as a voltage-to-current (V-I) converter. Let the BJTs be matched with F 5 150 and VA 5 80 V. (a) Assuming the signal source has a dc component of 0 V, fi nd the small-signal parameters Ri , Ro, and the transconductance gain ioyvsig. Hint: after fi nding Ri , fi nd the voltage gain vi yvsig, and obtain the transconductance gain as ioyvsig 5 (vi yvsig) 3 (ioyvi ). (b) Find the signal-to-load voltage gain voyvsig if the load is a resistance RL 5 5.0 kV. (c) Justify the claim that the voltage gain of (b) could have been estimated as voyvsig > RLyRsig. Under what conditions is this claim valid?