In deriving Eqs. (7.111) through (7.113) for the two-stage CMOS op amp, we assumed the internal parasitic capacitances to be negligible compared to the external capacitances Cc and CL. We wish to...

In deriving Eqs. (7.111) through (7.113) for the two-stage CMOS op amp, we assumed the internal parasitic capacitances to be negligible compared to the external capacitances Cc and CL. We wish to verify by performing a series of tests on the basic PSpice op amp of that will allow for the indirect estimation of its internal parasitics (all tests are shall be performed with Cc 5 0, so Cf 5 Cgd5). (a) For the fi rst test we set Vi 5 0, short Vo to ground to inhibit the Miller affect by M5, inject a test current It into node V1, and plot the impedance Z1 5 V1yIt . If Z1 exhibits a pole frequency of 16.2 MHz, estimate the sum Ci 1 C1 1 Cf in the ac equivalent of (b) Now repeat part (a), but with node Vo open circuited to enable the Miller effect. If this causes the dominant pole frequency of Z1 to drop from 16.2 MHz to 2.25 MHz, estimate Cf . (c) Next, terminate node V1 on a large (1 F) capacitance to establish an ac ground over the frequencies of interest, inject a test current It into node Vo, and plot the impedance Zo 5 VoyIt . If Zo exhibits a pole frequency of 25.3 MHz, estimate C2 1 Cf in the ac equivalent of (d) Finally, activate the input source Vi and short Vo to ground. If the gain a1 5 V1yVi exhibits a high-frequency asymptote of 215 dB, estimate Ci and C1 in(e) Using the above stray capacitances, recalculate f1 and f2 for compare, and comment.