If the RAM has a two byte data word and address bits are grouped for direct mapping with a cache memory as follow: 14 bits 9 bits 5 bits When it is read from RAM to cache what other words come with...


If the RAM has a two byte data word and address bits are grouped for<br>direct mapping with a cache memory as follow:<br>14 bits<br>9 bits<br>5 bits<br>When it is read from RAM to cache what other words come with the<br>word whose address is AFF0ODC<br>O a.<br>All words from address 00FFOOC0 to 00FF0ODF<br>O b.<br>All words from address 00FF00C0 to 00FF00CF<br>O C. All words from address 00FF0ODC to 0OOFF0ODF<br>d. All words from address 00FF0ODO to 00FF0ODF<br>

Extracted text: If the RAM has a two byte data word and address bits are grouped for direct mapping with a cache memory as follow: 14 bits 9 bits 5 bits When it is read from RAM to cache what other words come with the word whose address is AFF0ODC O a. All words from address 00FFOOC0 to 00FF0ODF O b. All words from address 00FF00C0 to 00FF00CF O C. All words from address 00FF0ODC to 0OOFF0ODF d. All words from address 00FF0ODO to 00FF0ODF

Jun 09, 2022
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