If the I e r a s e d of a NAN D Flash memory cell is 20 µA and the I p r o g is 2 µA, explain, what the bit line voltage will do when reading out the cell in the following configuration, Fig. 16.75....

If the I
_{e r a s e d}
of a NAN D Flash memory cell is 20 µA and the I
_{p r o g}
is 2 µA, explain, what the bit line voltage will do when reading out the cell in the following configuration, Fig. 16.75. Will the bit line go all the way to VDD? all the way to ground? Explain. If the bit line capacitance is 200 F, estimate the length of time it will take the data on the bit line to settle before it can be read out. Assume that the VDD is 5 V and the bit line is equilibrated to 2.5 V prior to sensing.