i) Two processor architectures are being evaluated for a 400 MHz computer with three classes of instructions. Class A, Class B, and Class C, which requires one, two, and three cycles, respectively....

i) Two processor architectures are being evaluated for a 400 MHz computer with three classes of instructions. Class A, Class B, and Class C, which requires one, two, and three cycles, respectively. Both processors are used to generate code for major software development. a) 4 billion Class A instructions, 0.5 billion Class B instructions, and 0.5 billion Class C instructions are used in the first processor code. b) The code for the second processor contains 5 billion Class A instructions, 0.5 billion Class B instructions, and 0.5 billion Class C instructions According to MIPS, which sequence will be faster? Which of the following sequences will be faster in terms of execution time?