HA7-main.s to fill up the code and world document for the question. the rest for lecture like how we do in assembly language and i will give example for that in the chat so please see the lecture before you do the assignment because it is ARM assemblylanguageis not very commonprogramming and send you the example for it to understand better
Name -------___________________________________ Last 4 digits of Social Security___________ CS-238Assembly Language Programming HW-07 Write an assembly language program to examine the elements of a list of positive 32-bit signed integer stored at location SAMPLE. The length of the list is saved in memory in LEN variable. The first element of the list is stored in MIN and MAX as the temporary minimum and maximum value of the list in memory. The program will scan the whole list and find out the actual min and max of the list. The program will display the max and min to user and it will store the value in memory in FMIN and FMAX. EECS Department, Wichita State UniversityPage 1 of 1 ARM INSTRUCTION SET Assembler Directives DCBDefine constant byte, Reserve a 8-bit value DCWDefine constant half-word, Reserve a 16-bit value DCDDefine constant data word, Reserve a 32-bit value 1 2 3 LDRRd, = Label ; get address for Label LDRRd, =constant ;get the constant ADRRd, a ; get address for a 4 5 6 Base-plus-offset Addressing (1/2) Pre-indexing LDR r0,[r1,#4];r0:=mem32[r1+4] Offset up to 4K, added or subtracted, (# -4) Post-indexing LDR r0,[r1],#4;r0:=mem32[r1], r1:=r1+4 Equivalent to a simple register-indirect load, but faster, less code space Auto-indexing / Prep-indexing with write-back LDR r0, [r1,#4]!;r0:=mem32[r1+4],r1:=r1+4 No extra time, auto-indexing performed while the data is being fetched from memory 6 7 0X003 0X045 0X023 0X040 0X00002000 0X00002004 0X00002008 0X0000200C LDR r0,[r1,#4]; r0:=mem32[r1+4] Pre-indexing PRE(Before Execution) r0 = 0X192 r1 = 0X00002000 r1 (base register) 0X00002000 #4 offset r0 = 0X023 Post-indexing LDR r0,[r1],#4 ;r0:=mem32[r1], r1:=r1+4 0X003 0X045 0X023 0X040 0X00002000 0X00002004 0X00002008 0X0000200C r1 (base register) 0X00002000 #4 offset r0 = 0X040 PRE(Before Execution) r0 = 0X192 r1 = 0X00002000 8 Base-plus-offset Addressing (2/2) 9 10 11 Condition code: The N and Z flags are set according to the result of the addition, and the C and V flags are set according to whether the addition generated a carry and overflow 12 Arithmetic Instruction: MVN (MOVE NOT) MVN Rd, Operand2 MVNR0, R2 The MVN instruction takes the value of Operand2, performs a bitwise logical NOT operation on the value, and places the result into Rd. 13 MVN r0, #0x00ff0000 POST r0 = 0xff00ffff Arithmetic Instruction: MOV MOV Rd, Operand2 The MON instruction copies Operand2 to a destination register Rd, where Operand2 is a register or immediate value. 14 PRE R5 = 5 R7 = 8 MOV R7, R5 ; let R7 = R5 (comment) POST R5 = 5 R7 = 5 Arithmetic Instruction: MOV 15 PRER5 = 5 R7 = 8 MOV R7, R5, LSL #2 ; let R7 = R5*4 = (R5 < 2)="" post="" r5="5" r7="20" condition="" code:="" the="" n="" and="" z="" flags="" are="" set="" according="" to="" the="" value="" moved="" and="" the="" c="" flag="" is="" set="" to="" the="" carry="" output="" bit="" generated="" by="" the="" shifter.="" the="" v="" flag="" is="" unaffected="" arm="" instruction="" set="" subtraction="" instructions="" 1="" 1="" the="" multiply="" instructions="" multiply="" the="" contents="" of="" a="" pair="" of="" registers="" and,="" depending="" upon="" the="" instruction,="" accumulate="" the="" results="" in="" with="" another="" register.="" the="" long="" multiplies="" accumulate="" onto="" a="" pair="" of="" registers="" representing="" a="" 64-bit="" value.="" the="" final="" result="" is="" placed="" in="" a="" destination="" register="" or="" a="" pair="" of="" registers.="" multiply="" instructions="" 2="" 2="" 32-bit="" product="" (least="" significant)="" 3="" example="" this="" example="" shows="" a="" simple="" multiply="" instruction="" that="" multiplies="" registers="" r1="" and="" r2="" together="" and="" places="" the="" result="" into="" register="" r0.="" in="" this="" example,="" register="" r1="" is="" equal="" to="" the="" value="" 2,="" and="" r2="" is="" equal="" to="" 2.="" the="" result,="" 4,="" is="" then="" placed="" into="" register="" r0.="" pre="" r0="0x00000000" r1="0x00000002" r2="0x00000002" mul="" r0,="" r1,="" r2="" ;="" r0="r1*r2" post="" r0="0x00000004" r1="0x00000002" r2="0x00000002" 4="" 5="" the="" mla="" instruction="" multiplies="" the="" values="" from="" rn="" and="" rm,="" adds="" the="" values="" from="" ra,="" and="" places="" the="" least="" significant="" 32="" bits="" of="" the="" result="" in="" rd="" 6="" 7="" syntax:="">
{}{S} RdLo, RdHi, Rm, Rs 64-bit Product 8