Given that many systems have a single bus that can be controlled by only one bus master at a time( and thus the CPU cannot use the bus for other activities during I/O transfers) explain with a diagram...

Given that many systems have a single bus that can be controlled by only one bus master at a time( and thus the CPU cannot use the bus for other activities during I/O transfers) explain with a diagram how a system that uses DMA for I/O can out perform one in which all I/O done by the CPU