For the folded-cascode amplifier shown in Fig. 6.20, with the transistor sizes given in Table 6.1, estimate the approximate frequency of the second pole caused by the parasitic capacitances at the drains of and . Assume a power supply is used, and the total supply current is 0.4 mA as in Example 6.9. To simplify matters, junction capacitances can be ignored. What should be to achieve 70° phase margin? What would the corresponding unity-gain frequency and slew rate be?
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