For simplicity, let us assume that each instruction on a RISC processor is executed in 2 microseconds and that an I/O device can only wait for an interrupt to be handled for a maximum of 1 millisecond...

For simplicity, let us assume that each instruction on a RISC processor is executed in 2 microseconds and that an I/O device can only wait for an interrupt to be handled for a maximum of 1 millisecond before it is serviced. Do you know how many instructions may be executed with interrupts deactivated before they reach a specific number of instructions?