n paging (given diagram), for CPU request there are two access time one for accessing page table and one for physical memory access. How should we minimize this access time? Redraw the figure....

n paging (given diagram), for CPU request there are two access time one for accessing page table and one for physical memory access.

1. 
   

   How should we minimize this access time? Redraw the figure.

   
   


2. 
   

   Formulate the formula for Effective Access Time.

   
   


3. 
   

   Calculate the Effective Access Time (EAT) by assuming the Hit ratio (?)
   85% and 95%. Cache Access Time (ε) is 20 microsecond and Memory Access Time (Τ) is 100 microsecond.

   
   

Extracted text: f logical physical address address fo000 ... 0000 CPU d f d. f1111... 1111 physical memory page table