Explain why when a receiving IV (IVr) is less than or equal to the IV of the currently executing interrupt handler (IVc), the CPU will ignore the IVr until IVr > IVc. Computer security (secure...

Explain why when a receiving IV (IVr) is less than or equal to the IV of the currently executing interrupt handler (IVc), the CPU will ignore the IVr until IVr > IVc. Computer security (secure interruption): See Exercise 11.36 for detecting register spoofing, splicing, or replay attack upon returning from an interruption (also see Sec. 11.11.9).