e t n Se 11 • REC Assume a very simple microprocessor with 12 address lines with which we wish to implement only a quarter of the largest addressable memory using the same 512x8 memory chips. Physical...

Extracted text: e t n Se 11 • REC Assume a very simple microprocessor with 12 address lines with which we wish to implement only a quarter of the largest addressable memory using the same 512x8 memory chips. Physical memory must be placed on the upper half of the memory map. a. What is the size of the memory implemented? b. How many memory chips would be needed to implement this memory space? c. How many lines would each chip require to address its internal memory cells? d. How many lines would be required to select each chip e. Draw a simplified partial address decoding table listing all the memory chips as (MEMO, MEM1, MEM 2. etc.) and show the lines used for address decoding (chip selection) and those used to address internal memory cells. Fill the table appropriately with 1's, O's and X's (don't cares). 4. Consider the data definition statement below. num1 WORD 192AH array1 WORD OA23BH, 7EA1H, 5BEFH a. Write assembly code to compute the size of the data label array1. b. Write assembly code to add the second element of array1 to