Draw the mapping cache memory for this system and view the details of the connection between cache memory and main memory with this parameter ?
Cache is divide into two memories (one for data and another for instruction)
Cache size 16 bytes (8 for data 8 for instruction)
Block line size 16bytes
Main memory size is 16Mbytes and each byte addressing to 24 bit address
Cache design 2-way set associative
Already registered? Login
Not Account? Sign up
Enter your email address to reset your password
Back to Login? Click here