Design a 1-bit, 8-to-1 MUX using a combination of 1-bit, 2-to-1 and 1-bit, 4-to-1 MUXs. Also estimate its propagation delay assuming that NAND gates have 0.1 ns delay and a 4-to- 1 MUX implements SOP...

Design a 1-bit, 8-to-1 MUX using a combination of 1-bit, 2-to-1 and 1-bit, 4-to-1 MUXs. Also estimate its propagation delay assuming that NAND gates have 0.1 ns delay and a 4-to- 1 MUX implements SOP expressions. Verify that the circuit in Fig. 3.22 implements the ALU Map module.