Consider two adjacent levels in a memory hierarchy, where all memory references are satisfied in one or the other of the two levels. Assume that access to the upper level consumes 3 nanoseconds, and...

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Extracted text: Consider two adjacent levels in a memory hierarchy, where all memory references are satisfied in one or the other of the two levels. Assume that access to the upper level consumes 3 nanoseconds, and that 95% of the memory references result in a hit in the upper level. If the average memory access time is 5 nanoseconds, what is the miss penalty? 40 ns 60 ns 80 ns 100 ns O None of the above.