Consider the lower portion of comprising the current mirror M5-M6 and the diodeconnected transistor M7 establishing the bias current for M5. Let the process parameters be k9 5 100 A/V2 , 9 5 0.08 m/V...

Consider the lower portion of comprising the current mirror M5-M6 and the diodeconnected transistor M7 establishing the bias current for M5. Let the process parameters be k9 5 100 A/V2 , 9 5 0.08 m/V and Vt 5 0.5 V (for simplicity, ignore the body effect for M7). (a) Specify W6 and L6 so that M6 draws 100 A with a 0.4-V overdrive voltage, and exhibits an output resistance of 250 kV. (b) Specify the W5yL5 ratio so that M5 provides the required gate bias for M6 while drawing 25 A. (c) Specify the W7yL7 ratio so that M7 biases M5 at 25 A with VSS 5 22.5 V.