Consider the following variant of the linear array interconnection network for SIMD computers. In addition to the usual links connecting the processors, a further communication path known as a bus is...

Consider the following variant of the linear array interconnection network for SIMD computers. In addition to the usual links connecting the processors, a further communication path known as a bus is available, as shown in Fig. 2.5. At any given time during the execution of an algorithm, precisely one of the processors is allowed to broadcast one of the input data to the other processors using the bus. All processors receive the datum simultaneously. The time required by the broadcast operation is assumed to be constant. Repeat problem 2.6 for this modified linear array.