Consider the following sequence of instructions: 1. LOAD F4, 16(R2) 2. LOAD F6, 48(R2) 3. MUL F10, F4, F8 4. ADD F8, F10, F6 5. STORE F8, 0(R3) The number of stall cycles during the execution of these...

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Extracted text: Consider the following sequence of instructions: 1. LOAD F4, 16(R2) 2. LOAD F6, 48(R2) 3. MUL F10, F4, F8 4. ADD F8, F10, F6 5. STORE F8, 0(R3) The number of stall cycles during the execution of these instructions on the regular 5 stage pipelined processor