Consider the circuit shown in Fig. P6.48, where a high-output-impedance opamp is used. Capacitor is the parasitic capacitance at the opamp input, while is the output capacitance. Assuming linear...

Consider the circuit shown in Fig. P6.48, where a high-output-impedance opamp is used. Capacitor is the parasitic capacitance at the opamp input, while is the output capacitance. Assuming linear settling, show that the optimal value for minimizing the time constant of this circuit is given by