Consider a direct-mapped write-through cache design using 48-bit memory addressing and containing 2MB of data. Each block consists of a double-word and auxiliary bits for this cache design. • What is...

Extracted text: Consider a direct-mapped write-through cache design using 48-bit memory addressing and containing 2MB of data. Each block consists of a double-word and auxiliary bits for this cache design. • What is the total number of blocks in the cache? [ Select] • What is the total size (i.e., the total space used) in bits of a cache with 1MB of data? [ Select ]